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LTM4613
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full internal
operating temperature range, otherwise specifications are at T A = 25°C (Note 2), V IN = 24V, unless otherwise noted. Per Typical
Application (front page) configuration.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Control Sectio n
V FB
V RUN
I SS / TRACK
Voltage at V FB Pin
RUN Pin On/Off Threshold
Soft-Start Charging Current
I OUT = 0A, V OUT = 12V
V SS/TRACK = 0V
l
0.591
1
–1
0.6
1.5
–1.5
0.609
1.9
–2
V
V
μA
V FCB
I FCB
t ON(MIN)
t OFF(MIN)
R PLLIN
I DRVCC
R FBHI
V MPGM
V MARG0 ,
V MARG1
Forced Continuous Threshold
Forced Continuous Pin Current
Minimum On-Time
Minimum Off-Time
PLLIN Input Resistor
Current into DRV CC Pin
Resistor Between V OUT and V FB
Pins
Margin Reference Voltage
MARG0, MARG1 Voltage
Thresholds
V FCB = 0V
(Note 3)
(Note 3)
V OUT = 12V, I OUT = 0A, DRV CC = 5V
0.57
99.5
0.6
–1
50
250
50
22
100
1.18
1.4
0.63
–2
100
400
30
100.5
V
μA
ns
ns
kΩ
mA
kΩ
V
V
PGOOD
?V FBH
?V FBL
?V FB(HYS)
V PGL
PGOOD Upper Threshold
PGOOD Lower Threshold
PGOOD Hysteresis
PGOOD Low Voltage
V FB Rising
V FB Falling
V FB Returning
I PGOOD = 5mA
7
–7
10
–10
1.5
0.2
13
–13
0.4
%
%
%
V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM4613 is tested under pulsed load conditions such that
T J ≈ T A . The LTM4613E is guaranteed to meet performance specifications
over the 0°C to 125°C internal operating temperature range. Specifications
over the –40°C to 125°C internal operating temperature range are assured
by design, characterization and correlation with statistical process
controls. The LTM4613I is guaranteed to meet specifications over the
–40°C to 125°C internal operating temperature range. The LTM4613MP
is guaranteed and tested over the full –55°C to 125°C internal operating
temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
resistance and other environmental factors.
Note 3: 100% tested at die level only.
Note 4: See the Output Current Derating curves for different V IN , V OUT
and T A .
Note 5: Guaranteed by design.
4613f
4
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